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失物招領

工程學院電子工程系

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應用積體電路設計與量測研究室(E2502)



更新日期:102年11月13日

一、研究主題:
  1、VCO、PLL電路設計。
  2、IC佈局(Layout)。

二、教師研究群:蔡澈雄老師、陳耀煌老師、張培華老師、蔡文周老師。

三、開放時間:08:00至23:00。

四、研究生:
  在學:

  畢業:
   2012年:張煌輝
   2011年:
   2010年:張家祥、陳冠宇、王士瑋、施勝獻
   2009年:李昱寬、陳彥汶、張維麟
   2008年:籃耿晃、林明信
   2007年:王敬舜、劉士豪、林奕志、洪士勛

五、大學部專題生:
  在學:
   李慈眉、廖育萱、洪薇莉、林威宏、林煒軒、吳冠宏、林昕緯、林俊汶、張哲維

  畢業:
   2013年:李佩欣、沈信穎、粘宇夆、鄭鴻懋、黃俊瑋、董晏辰、廖韋凱、鄒宜峰、陳家凱、王凱幼、許嘉仁、歐力進
   2012年:江正傑、夏松義、黃建宏
   2011年:曾世鎰、高振凱、侯佑民、張冠程、許祐端、鍾政全、黃柏穎、陳緯峰、李銘偉李、文凱張、張邳鈞、侯政豪、劉育淳
   2010年:謝武諺、吳炳鋒、葉育男、李彰育、劉韋呈、鄭翔澤
   2009年:黃琨元)、蔡宗憲、陳裕翔、黃致校、洪家偉、李易燦、劉育昇、陳宏偉、黃國舜、邱景翔
   2008年:蕭仲志、王仕裕、江峰昌、吳逢致、郭順和、李昱寬、張嘉文、郭宗瓛、程正欽、林子愉、葉維倫、吳佳明、謝明益、廖俊傑、吳政隆、沈俊佑
   2007年:

六、研究室成果(競賽):
  2009奇景盃佳作共4組,最佳團隊。
  2010奇景盃佳作共2組。
  2011奇景盃優等1組、佳作共2組。
  2012奇景盃特優1組、優等1組、佳作1組、最佳團隊。
  2013奇景盃佳作共2組、完成獎2組。

七、研究室成果(論文):
  期刊:
   2012
   1.Cher-Shiung Tsai, Kwang-Jow Gan*, and Ming-Shin Lin, “Low Phase Noise and Wide Tuning Range VCO Using the MOS Differential Amplifier with Active Load”, CS_Copmuter & Communications Circuits and Systems, Vol. 3, No. 4, pp.307-310, October, 2012. (Impact Factor: 0.46)

  研討會:
  2005
  1.Cher-Shiung Tsai, Chung-Chih Hsiao, Kwang-Jow Gan, Jia-Ming Wu, Ming-Yi Hsieh, Chun-Chieh Liao, Shih-Yu Wang, Feng-Chang Chiang, Chia-Hung Chen, Dong-Shong Liang, and Yaw-Hwang Chen, “An Oscillator Design Based on MOS-NDR Inverter” , 2005 International Conference on Informatics, Cybernetics, and Systems, 義守大學, 94/4/28~29, 2005, pp.1063-1067.
  2.Cher-Shiung Tsai, Jia-Ming Wu, Ming-Yi Hsieh, Chun-Chieh Liao, Tien-Hung Chang, Kwang-Jow Gan, Dong-Shong Liang, Yaw-Hwang Chen, Chia-Hung Chen, and Chun-Ming Wen, “A MOS DIFFERENTIAL AMPLIFIER OSCILLATOR”, 16th VLSI Design/CAD Symposium中央大學,花蓮美崙大飯店, 94/8/9~12, 2005.
  3.Cher-Shiung Tsai, Jia-Ming Wu, Ming-Yi Hsieh, Chun-Chieh Liao, Jeng-Lung Wu, Kwang-Jow Gan, Dong-Shong Liang, Yaw-Hwang Chen and Chia-Hung Chen, “A VHF Oscillator Design Based on MOS Differential Amplifier”, 2005 National Workshop on Internet and Communication Technology (NWICT’05), 聖約翰科技大學,2005年11月16日, pp. 101-106. (ISBN:986-81668-0-2).
  4.Cher-Shiung Tsai, Chun-Chieh Liao, Ming-Yi Hsieh, Jia-Ming Wu, Tien-Hung Chang, Kwang-Jow Gan, Dong-Shong Liang, Yaw-Hwang Chen, and Chia-Hung Chen, “An Oscillator Design Based On BJT Differential Amplifier by Simulation”, 2005年民生電子暨信號處理研討會,雲林科技大學,九十四年十一月十七~十八日.
  5.Cher-Shiung Tsai, Ming-Yi Hsieh, Jia-Ming Wu, Chun-Chieh Liao, Jeng-Lung Wu, Kwang-Jow Gan, Yaw-Hwang Chen, Dong-Shong Liang, Chia-Hung Chen and Chung-Chih Hsiao, “An Oscillator Design Based On MOS Differential Amplifier by Simulation”, 2005電子元件暨材料研討會,義守大學,2005年11月24、25日.

  2006
  1.Cher-Shiung Tsai, Chia-Hung Chen, Jia-Wei Hong, Chin-Yo Shen, Yih-Tsan Lee,Kwang-Jow Gan, Yaw-Hwang Chen, and Chun-Ming Wen, “An Oscillator Design Based on BJT Cascode Load Differential Amp.”, 2006 International workshop on multi-project chip (IWMC’06) Apr 1(Sat.)—Apr 2(Sun.) Howard International House, Taipei/International Conference Hall, NTNU, Taiwan,pp.92-93.
  2.Cher-Shiung Tsai, Chia-Hung Chen, Zong-Xian Tsai, Kun-Yuan Huang, Yu-Xiang Chen, Zhi-Jiao Huang, Kwang-Jow Gan, and Yaw-Hwang Chen, “An Oscillator Design Based on Bi-CMOS Differential Amplifier”, 2006 International workshop on multi-project chip (IWMC’06) Apr 1(Sat.)—Apr 2(Sun.) Howard International House, Taipei/ International Conference Hall, NTNU, Taiwan,pp.94-95.
  3.Cher-Shiung Tsai, Chin-Yo Shen, Yih-Tsan Lee, Jia-Wei Hong, Kun-Yuan Huang, Kwang-Jow Gan, Dong-Shong Liang and Yaw-Hwang Chen “Oscillators Design Based on MOS Active Load and Cascode Active Load Differential Amplifier”, National Conference on Modern Electrical Engineering Technolgies 2006, NCMEET’06, 吳鳳技術學院, 2006年6月2日,pp.238-243.
  4.Cher-Shiung Tsai, Yu-Xiang Chen, Zong-Xian Tsai, Kun-Yuan Huang, Zhi-Jiao Huang,Kwang-Jow Gan, Dong-Shong Liang and Yaw-Hwang Cheng,” Two Bi-CMOS Cascode Active Load Differential Amplifier Oscillators”, 第一屆智慧生活科技研討會(ILT 2006), 國立勤益技術學院, 2006年6月9日(五)
  5.Cher-Shiung Tsai, Zong-Xian Tsai, Zhi-Jiao Huang, Kun-Yuan Huang, Yu-Xiang Chen, Kwang-Jow Gan, Dong-Shong Liang and Yaw-Hwang Chen,” An Oscillator Design Based on BJT Active Load Differential Amplifier”, 2006高速電路板設計研討會(HSPCB2006) 聖約翰科技大學, 2006年6月9日(五). (ISBN:957-21-5405 -2)
  6.Cher-Shiung Tsai, Chin-Yo Shen, Yih-Tsan Lee, Jia-Wei Hong, Kun-Yuan Huang, Kwang-Jow Gan, Dong-Shong Liang, and Yaw-Hwang Chen,” An Oscillator Design Based on Bi-CMOS Cascode Load Differential Amplifier”, 2006高速電路板設計研討會(HSPCB2006) 聖約翰科技大學, 2006年6月9日(五). (ISBN:957-21-5405-2)
  7.Cher-Shiung Tsai, Kun-Yuan Huang, Zong-Xian Tsai, Yu-Xiang Chen, Zhi-Jiao Huang, Kwang-Jow Gan, Dong-Shong Liang and Yaw-Hwang Chen” Comparisons between Two BJT Differential Amplifier Oscillators”, 2006 Communication Electronic Technology and Application2006通信電子科技與應用研討會(CECA 2006), 國立高雄應用科技大學,2006年7月6日(四).
  8.Cher-Shiung Tsai, Zong-Xian Tsai, Kun-Yuan Huang, Kwang-Jow Gan and Dong-Shong Liang, “Comparisons between Two Bi-CMOS Differential Amplifier Oscillators”, International Electron Devices & Materials Symposia 2006 (2006 IEDMS) National Cheng Kung University, Tainan, Taiwan, December 7-8 ,2006. pp.328-329.

  2007
  1.Cher-Shiung Tsai, Shu-Yin Jiang, Ming-Yuan Guo, Kwang-Jow Gan and Pei-Hua Chang “A VHF Oscillator Design Based on BJT Cascode Active Load Differential Amplifier”, 2007年系統雛形與電路設計創新應用研討會,崑山科大,2007年9月28日.
  2.蔡澈雄 張建鏵 江淑音 郭銘遠 甘廣宙 張培華.” 以Bi-CMOS差動放大器為設計基礎之壓控振盪器”, UHC2007 第一屆全國優質家庭學術研討會,崑山科大,2007年11月29日.
  3.Cher-Shiung Tsai, Ming-Hsin Lin, Chien-Hua Chang, Shu-Yin Jiang, Ming-Yuan Guo,、Kwang-Jow Gan, ,Dong-Shong Liang, Pei-Hua Chang and Yaw-Hwang Chen “Wide Band Oscillator Design Based on Bi-CMOS Active Load Differential Amplifier”, 2007 IEEE Conference on Electron Devices and Solid-State Circuits (EDSSC 2007), Tainan, Tayih Landis Hotel, Taiwan, ROC., December 20-22, 2007. Vol.2, pp.773-776
  4.Cher-Shiung Tsai, Ming-Yuan Guo, Chien-Hua Chang, Shu-Yin Jiang, Ming-Hsin Lin, Kwang-Jow Gan, Pei-Hua Chang, Dong-Shong Liang and Yaw-Hwang Chen,” A VHF Oscillator Design Based on BJT Active Load Differential Amplifier”, 2007 IEEE Conference on Electron Devices and Solid-State Circuits (EDSSC 2007), Tainan, Tayih Landis Hotel, Taiwan, ROC., December 20-22, 2007. Vol.2, pp.917-920. (ISBN:1-4244-0637-4)

  2008
  1.Cher-Shiung Tsai, Ming-Hsin Lin, Ping-Feng Wu, Chang-Yu Li, Yu-Nan Yeh, Wu-Yan Sie, Kwang-Jow Gan, Pei-Hua Chang, Dong-Shong Liang, Jin-Wei Wu and Chia-Hsiang Chang, “An Oscillator Design Based on Bi-CMOS Differential Amplifier Using Standard SiGe Process”, 2008 IEEE International Workshop on Next Generation Electronics (IWNE), Kun Shan University, Tainan County, Taiwan, 20-21 November 2008, pp.45-46. (ISBN:978-986-6507-04-5)

  2009
  1.Cher-Shiung Tsai, Ming-Hsin Lin, Ping-Feng Wu, Wu-Yan Sie, Yu-Nan Yeh, Chang-Yu Li, Wei-cheng Liu, Hsiang-Tse Cheng, Chun-Yi Yeh, Kwang-Jow Gan, Pei-Hua Chang and Chia-Hsiang Chang,” An Oscillator Design Based on Bi-CMOS Cascoded Active Load Differential Amplifier Using Standard 0.35μm SiGe Process”, Proceedings of 2009 National Symposium on Telecommunications,高雄大學,2009年12月11-12日,pp.138-141
  2010
  1.鍾政全1,*、許祐端1、侯佑民1、李文凱1、蔡澈雄1、甘廣宙2、黃耿凌1”以0.18-μm 製程模擬電流源控制五級環型壓控振盪器”, UHC2010 全國優質家庭學術研討會,崑山科大,2010年11月4日,PP.48-51.
  2.侯佑民1,*、李文凱1、黃柏穎1、陳緯峰1、蔡澈雄1、甘廣宙2、張培華1、黃憲章1”以0.18-μm 製程模擬三級自我穩壓環型振盪器”, UHC2010 全國優質家庭學術研討會,崑山科大,2010年11月4日,PP.257-260.
  3.張冠程1,*、李銘偉1、高振凱1、張邳鈞1、蔡澈雄1、甘廣宙2、張培華1,”以0.18-μm 製程模擬二級差動延遲環型壓控振盪器”, UHC2010 全國優質家庭學術研討會,崑山科大,2010年11月4日,PP.253-256.
  4.陳緯峰1,*、黃柏穎1、曾世鎰1、侯政豪1、蔡澈雄1、甘廣宙2、黃耿凌1, ”以0.18-μm 製程模擬五級含次回授環形振盪器”, UHC2010 全國優質家庭學術研討會,崑山科大,2010年11月4日,PP.36-39.
  5.高振凱1,*、張邳鈞1、張冠程1、李銘偉1、蔡澈雄1、甘廣宙2、張培華1、黃憲章1,“以0.18-μm 製程模擬負延遲壓控環形振盪器”, UHC2010 全國優質家庭學術研討會,崑山科大,2010年11月4日,PP.44-47.
  6.曾世鎰1,*、侯政豪1、許祐端1、鍾政全1、蔡澈雄1、甘廣宙2、黃憲章1、張培華1,“以0.18-μm 製程模擬四級差動雙延遲環形壓控振盪器”, UHC2010 全國優質家庭學術研討會,崑山科大,2010年11月4日,PP.40-43.

  2011
  1.“張煌輝、曾世鎰、江正傑、夏松義、黃建宏、蔡澈雄、甘廣宙、張培華”, 以0.18-μm 製程實現四級差動雙延遲無迴授環形壓控震盪器”, UHC2011 全國優質家庭學術研討會,崑山科大,2011年10月20日,PP.22-27.
  2.張煌輝、曾世鎰、黃建宏、江正傑、夏松義、蔡澈雄、甘廣宙、張培華, “ 四級差動雙延遲環形壓控振盪器有無負迴授電路之比較”,UHC2011 全國優質家庭學術研討會,崑山科大,2011年10月20日,PP.33-41.

  2012
  1.沈信穎、蔡澈雄、甘廣宙、曾世維,”以NMOS-PNP主動負載差動放大器為設計基礎的UHF鎖相迴路之模擬”, UHC2012 全國優質家庭學術研討會,崑山科大,2012年10月25日,PP.79-84.
  2.黃俊瑋、粘宇夆、董晏辰、蔡澈雄、甘廣宙、黃憲章,”以0.18-μm 製程模擬CMOS 主動負載差動放大器之壓控振盪器”,UHC2012全國優質家庭學術研討會,崑山科大,2012年10月25日,PP.135-139.

  2013
  1.李佩欣、林泉福、蔡澈雄、甘廣宙,”以PMOS-NPN主動負載差動放大器為設計基礎的UHF鎖相迴路之模擬”,2013第十一屆討會微電子技術發展與應用研討會, 高雄海洋科技大學, 102/06/06, pp.270-277.
  2.王凱幼、陳家凱、廖韋凱、鄒宜峰、許嘉仁、蔡澈雄、甘廣宙、張培華,”以0.18-μm製程模擬PMOS-NPN差動放大器之壓控振盪器”,2013第十一屆討會微電子技術發展與應用研討會, 高雄海洋科技大學, 102/06/06, pp.232-239.

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  研究所:賴宜賢(91)、黃培凱(91)、陳泂良(91)、郭士賓(91)、林慧婷(91)、王祥銘(91)、彭聖哲(91)、鄭福隆(91)、許政治(91)、蘇龍賢(92)、陳奇斌(92)、
      塗俊達(93)、溫峻明(93)、孫偉倫(93)、陳家弘(93)、王敬舜(94)、曾勝暘(94)、劉士豪(94)、林奕志(94)、洪士勛(94)、籃耿晃(95)、林明信(95)、
      李昱寬(96)、陳彥汶(96)、張維麟(96)、張家祥(97) 、陳冠宇(97) 、王士瑋(97) 、施勝獻(98)

  大學部:黃文賓(92)、曾信達(92)、粱德凱(93) 、張欣怡(93)、宋篁紋(93)、蕭仲志(93、94)、王仕裕(93、94)、江峰昌(93、94)、吳逢致(93、94)、
      郭順和(93、94)、李昱寬(93、94)、張嘉文(93、94)、郭宗瓛(93、94)、程正欽(93、94)、林子愉(93)、葉維倫(93、94)、吳佳明(93、94)、
      謝明益(93、94)、廖俊傑(93、94)、吳政隆(93、94)、沈俊佑(93、94)、黃琨元(94)、蔡宗憲(94)、陳裕翔(94)、黃致校(94)、洪家偉(94)、
      李易燦(94)、劉育昇(94)、陳宏偉(94)、黃國舜(94)、邱景翔(94)、謝武諺(97、98) 、吳炳鋒(97、98) 、葉育男(97、98) 、李彰育(97、98) 、
      劉韋呈(97、98) 、鄭翔澤(97、98)

專題製作參加校外競賽成果:
(1). 以λ型MOS-BJT-NDR元件設計射頻環型振盪器。(編號:SiG-94C-05b,甘廣宙/蕭仲志同學)。
(2). 適用於UHF收發模組之鎖相迴路設計。(編號:SiG-94C-08b,蔡澈雄、甘廣宙/陳家弘、謝明益、吳佳明、廖俊傑同學)。
(3). 以MOS-BJT-NDR元件與電陸實現4位元邏輯閘電路設計。(編號:SiG-94C-12b,甘廣宙/塗俊達同學)。
(4). 以MOS-BJT-NDR元件實現除頻器電路。(編號:SiG-94C-13b,甘廣宙/峻明同學)。
(5). MOS-BJT-NDR元件之參數調變及其應用在邏輯電路上之探討。(編號:SiG-94B-02t,甘廣宙教授/孫偉倫、塗俊達同學)。
(6). 以λ型負微分電阻元件實現高頻環型振盪器。(編號:SiG-94B-19b,甘廣宙教授/塗俊達、蕭仲志、陳奇斌同學)。
(7). 以雙介面電晶體差動放大器為設計基礎之振盪器。(編號:SiG-94B-20b,蔡澈雄,甘廣宙教授/吳佳明,廖俊傑同學)。
(8). 以MOS-NDR元件設計高頻壓控振盪器。(編號:D35-94A-05,甘廣宙教授/蕭仲志、王仕裕同學)。
(9). 以MOS-BJT-NDR元件與電路研究低功率邏輯閘電路設計。(編號:SiG-94A-06b/10b,甘廣宙教授/陳奇斌同學)。
(10). BJT-MOS-NDR元件和電路的設計與製作。(編號:SiG-92D-01b,甘廣宙教授/鄭福龍同學)。
(11). 新型R-BJT-NDR與MOS-BJT-NDR元件的設計與製作。(編號:SiG-92D-02b,甘廣宙教授/曾信達同學)。
(12). 以新型式MOS-NDR負微電阻元件設計邏輯電路之應用。(編號:S35-92C/30b,甘廣宙教授/黃文賓同學)。
(13). 多峰值MOS-NDR元件設計與應用電路製作。(編號:S35-92A/01b,甘廣宙教授/郭士賓同學)。
(14). 以CMOS構建之負微分電阻元件設計。(編號:S35-91D/04b,甘廣宙教授/郭士賓同學)。
(15). 以MOS構建之負微分電阻元件設計之多值記憶器與邏輯閘電路。(編號:S35-91D/05b,甘廣宙教授/郭士賓同學)。
(16). 新型多工器與解碼器電路設計。前瞻性晶片設計。(編號:SiG-94D-08b,陳耀煌、甘廣宙教授/溫峻明,羅傑文,蔡宗哲,陳柏昌同學)。
(17). 以負微分電阻之壓控振盪器為基礎的鎖相迴路設計。前瞻性晶片設計。(編號:SiG-94D-07b,蔡澈雄、甘廣宙教授/曾勝暘、陳家弘同學)。
(18). 新型多值記憶器電路設計。前瞻性晶片設計。(編號:SiG-94D-06b,陳耀煌、甘廣宙教授/溫峻明、洪士勛、林奕志、孫偉倫同學)。
(19). 新型N型與λ型負微分電阻元件設計。測試性晶片設計。(編號:SiG-94D-01t,甘廣宙教授/塗俊達同學)。
(20). 可程式邏輯控制的新型多重選擇之多值記憶器電路設計。前瞻性晶片設計。(編號:SiG35-96A-06b,甘廣宙、陳耀煌教授/林奕志同學)。
(21). 4對1新式T-閘解碼器與多工器電路之實現。前瞻性晶片設計。(編號:SiG35-96B-11b,甘廣宙、陳耀煌教授/林奕志同學)。
(22). 實現單穩態-雙穩態邏輯閘電路及其在除頻器與振盪器之應用。前瞻性晶片設計。(編號:SiG35-96B-10b,甘廣宙、陳耀煌教授/洪士勛同學)。
(23). 多功能邏輯閘電路設計及其在細胞式類神經網路電路的應用。前瞻性晶片設計。(編號:SiG35-96B-07b,甘廣宙教授/劉士豪同學)。
(24). 以主動負載差動放大器為設計基礎之UHF壓控振盪器。前瞻性晶片設計。(編號:SiG35-96C-21b,蔡澈雄、甘廣宙教授/林明信,張建鏵,江淑音,郭銘遠同學)。
(25). 新型差動比較器電路設計。前瞻性晶片設計。編號:SiG35-96D-25b,甘廣宙教授/王敬舜同學)。
(26). 以標準HBT元件構建新型NDR電路及應用探討。測試性晶片設計。(編號:SiG35-96D-22t,甘廣宙教授/籃耿晃同學)。

研究所升學成果:[1]. 梁德愷:(93/12甄試上台北科技大學電子工程研究所)。
[2]. 黃文賓:(92/12甄試上中央大學電機工程研究所)。
[3]. 曾信達:(92/12甄試上逢甲大學電子工程研究所)。
[4]. 王祥銘:(90/12甄試上雲林科技大學電子工程研究所)。
[5]. 彭聖哲:(90/12甄試上義守大學電子工程研究所)。
[6]. 黃培凱:(90/12甄試上義守大學電子工程研究所)。
[7]. 邱景祥:(95/12甄試上長庚大學電子工程研究所碩士班)。
[8]. 蔡宗憲:(95/12甄試上雲林科技大學電子工程研究所碩士班)。
[9]. 黃琨元:(95/12甄試上高雄第一科技大學電子工程研究所碩士班)。
[10]. 塗俊達:(94/12甄試上成功大學電機工程研究所博士班)。
[11]. 溫峻明:(94/12甄試上成功大學電機工程研究所博士班)。
[12]. 蕭仲志:(94/12甄試上暨南大學電機工程研究所碩士班)。
[13]. 王仕裕:(94/12甄試上彰化師範大學電子工程研究所碩士班)。
[14]. 謝明益:(94/12甄試上東華大學電機工程研究所碩士班)。
[15]. 吳佳明:(94/12甄試上台北科技大學電腦與通訊研究所碩士班)。
[16]. 廖俊傑:(94/12甄試上元智大學電機工程研究所碩士班)。

國科會研究計畫:(1). 開發新型MOS-BJT-NDR元件與應用積體電路之設計(2/3)。(NSC94-2215-E-168-001),(93/08~94/07),計畫主持人。
(2). 以負微分電阻元件實現高頻壓控振盪器電路。(NSC94-2815-C-168-005–E)。(94/07~95/02),計畫主持人。
(3). 開發新型MOS-BJT-NDR元件與應用積體電路之設計(1/3)。(NSC93-2215-E-168-002),(93/08~94/07),計畫主持人。
(4). 利用BiCMOS製程來設計與製作高調變性的負微分電阻元件與應用電路。(NSC92-2218-E-168-005),(92/08~93/07),計畫主持人。
(5). 適合CMOS與BiCMOS製程的負微分電阻元件及應用積體電路之研究。(NSC91-2215-E-168-001),(91/08~92/07),計畫主持人。
(6). 研製以電晶體構建的S型與N型負微分電阻元件,應用電路,與其積體電路化之探討。(NSC90-2215-E-168-002),(90/08~91/07),計畫主持人。
(7). 互動式電腦網路輔助模擬與教學系統-負電阻半導體元件原理,設計與應用。(NSC90-2516-S-168-001),(90/08~91/07),計畫主持人。
(8). 電腦輔助設計-類似Esaki二極體之N型負微分電阻元件串接電路之電流-電壓特性,磁滯現象與其應用電路之研究。(NSC89-2215-E-168-005),(89/08~90/07),計畫主持人。
(9). 電腦輔助設計-研究負微分電阻元件串接電路之結合電流-電壓特性。(NSC89-2215-E-168-003),(88/08~89/07),計畫主持人。
(10). 開發新型MOS-BJT-NDR元件與應用積體電路之設計(3/3)。(國科會,NSC95-2221-E-168-037) (95/08~96/07),計畫主持人。
(11). 95年度教育部大學院校推動奈米科技前瞻人才培育計畫。(教育部)(95/05~95/12),計畫主持人。
(12). 先進奈米材料之研發。(崑山科技大學)(95/8~96/7),計畫主持人。
(13). 96年度教育部大學院校推動奈米科技前瞻人才培育計畫。(教育部)(95/05~95/12),計畫主持人。
(14). 以矽鍺積體電路製程實現多峰值負微分電阻電路的新奇應用(I)。(國科會,NSC96-2221-E-168-033),(96/08~97/07),計畫主持人。
(15).以差動放大器設計與製造寬頻壓控振盪器。(國科會,NSC 97-2221-E-168 -046),(97/08/01 ~ 98/07/31),計畫主持人。

論文發表與專書著作:
Journal Papers
1. Kwang-Jow Gan, Cher-Shiung Tsai, and Yi-Zhi Lin, “Design of BiCMOS-Based Multiple-Peak Negative Differential Resistance Circuit with Adjustable Peak-to-Valley Current Ratio”, submitted to IEEE Transaction on Electron Devices, 2007.
2. Kwang-Jow Gan, Cher-Shiung Tsai, and Yi-Zhi Lin, “Standard BiCMOS Implementation of a Two-Peak Negative Differential Resistance Circuit with High and Adjustable Peak-to-Valley Current Ratio”, submitted to IEEE Electron Devices Letter, 2007.
3. Kwang-Jow Gan, Cher-Shiung Tsai, and Dong-Shong Liang, “Design and Characterization of the Negative Differential Resistance Circuits Using the CMOS and BiCMOS Process”, submitted to Analog Integrated Circuits and Signal Processing, 2007.
4. Kwang-Jow Gan, Dong-Shong Liang, and Cher-Shiung Tsai, “Novel Multiple-Selected and Multiple-Valued Memory Design Using Negative Differential Resistance Circuits Suitable for Standard SiGe-Based BiCMOS Process”, submitted to Analog Integrated Circuits and Signal Processing, 2007.
5. Kwang-Jow Gan, Dong-Shong Liang, Cher-Shiung Tsai, Chun-Ming Wen, and Yaw-Hwang Chen, “Design and Fabrication of Multiple-Valued Multiplexer Using Negative Differential Resistance Circuits and Standard SiGe Process”, revised by Solid State Electronics, 2007.
6. Kwang-Jow Gan, Cher-Shiung Tsai, Dong-Shong Liang, Chun-Da Tu, and Yaw-Hwang Chen, “Multiple-Input NOR Logic Design Using Negative Differential Resistance Circuits Implemented by Standard SiGe Process”, accepted by Solid State Electronics, 2007.
7. Kwang-Jow Gan, Dong-Shong Liang, Cher-Shiung Tsai, Yaw-Hwang Chen and Chun-Ming Wen, “Multiple-Valued Decoder Using MOS-HBT-NDR Circuit”, accepted by Electronic Letters, 2007.
8. Kwang-Jow Gan, Cher-Shiung Tsai, and Wei-Lun Sun, “Fabrication and Application of MOS-HBT-NDR Circuit Using Standard SiGe Process”, Electronic Letters, Vol. 43, No. 9, pp. 516-517, April, 2007.
9. Kwang-Jow Gan, Cher-Shiung Tsai, Dong-Shong Liang, Chun-Ming Wen, and Yaw-Hwang Chen, “Tri-Valued Memory Circuit Using MOS-BJT-NDR Circuits Fabricated by Standard SiGe Process”, Japanese Journal of Applied Physics, Vol. 45, No. 46, pp. L977-979, 2006.(impact factor:1.096)
10. Kwang-Jow Gan, Yaw-Hwang Chen, Cher-Shiung Tsai, and Long-Xian Su, “Four-Valued Memory Circuit Using Three-Peak MOS-NDR Devices and Circuits”, Electronic Letters, Vol. 42, pp. 21-22, 2006. (impact factor:1.016)
11. Kwang-Jow Gan,“Investigation of the Combined Current-Voltage Characteristics of Two Similar Esaki-Diode-Like Devices,”Japanese Journal of Applied Physics, Vol. 42, No. 10, pp. 6354-6358, 2003.
12. Kwang-Jow Gan“Characterization of the extrinsic hysteresis phenomena of series-connected identical Esaki-diode-like NDR devices,”Japanese Journal of Applied Physics, Vol. 41, No. 3A, pp. 1293-1299, 2002.
13. Kwang-Jow Gan“The low-high-low I-V characteristics of five to seven peaks based on four NDR devices,”IEEE Transaction on Electron Devices, Vol. 48, No. 8, pp. 1683-1687, 2001.
14. Kwang-Jow Gan“Hysteresis phenomena for the series circuit of two identical negative differential resistance devices,”Japanese Journal of Applied Physics, Vol. 40, No. 4A, pp. 2159-2164, 2001.
15. Kwang-Jow Gan“Novel four-peak or five-peak current-voltage characteristics for three negative differential resistance devices in series,”Solid State Electronics, Vol. 44, pp. 1597-1602, 2000.
16. Kwang-Jow Gan and Yan-Kuin Su,“Novel multipeak current-voltage characteristic of series-connected negative differential resistance devices,”IEEE Electron Devices Letter, Vol. 19, No. 4, pp. 109-111, 1998.
17. Kwang-Jow Gan, Yan-Kuin Su and Ruey-Lue Wang,“Simulation and analysis of negative differential resistance devices and circuits by load-line method and Pspice,”Solid State Electronics, Vol. 42, No. 1, pp. 176-180, 1998.
18. Kwang-Jow Gan and Yan-Kuin Su,“Modeling current-voltage and hysteretic current-voltage characteristics with two resonant tunneling diodes connected in series,”Solid State Electronics, Vol. 41, No. 12, pp. 1917-1922, 1997.
19. Kwang-Jow Gan and Yan-Kuin Su,“Modeling multipeak current-voltage characteristic and hysteresis phenomena for several resonant tunneling diodes connected in series,”Journal of Applied Physics, Vol. 82, No. 11, pp. 5822-5828, 1997.
20. Kwang-Jow Gan and Yan-Kuin Su,“Improved circuit design of multipeak current-voltage characteristics based on resonant tunneling diodes,”Japanese Journal of Applied Physics, Vol. 36, No. 10, p p. 6280-6284, 1997.
21. Kwang-Jow Gan, Yan-Kuin Su and Ruey-Lue Wang,“Modeling of three-peak current-voltage vharacteristics with two resonant tunneling diodes connected in series,”Journal of Applied Physics, Vol. 81, No. 10, pp. 6825-6829, 1997.
22. Y. K. Su, F. S. Juang, N. Y. Li, K. J. Gan and T. S. Wu,“Heteroepitaxial growth of gallium antimonide on GaAs by low pressure MOVPE,”Solid State Electronics, Vol. 34, No. 8, pp. 815-819, 1991.
23. Y. K. Su, K. J. Gan, F. S. Juang and J. S. Hwang,“Characterization of Si-implanted gallium antimonide,”Nuclear Instruments and Methods in Physics Research, B55, pp. 794-797, 1991.
24. Y. K. Su, F. S. Juang, and K. J. Gan,“Ohmic contacts of AuGeNi and Ag/AuGeNi to n-GaSb with various sintering temperature,”Japanese Journal of Applied Physics, Vol. 30, No. 5, pp.914-916, 1991.
25. Y. K. Su and K. J. Gan,“Raman spectra of si-implanted GaSb,”Journal of Applied Physics, Vol. 68, No. 11, pp.5584-5587, 1990.
26. F. S. Juang, Y. K. Su, N. Y. Li, and K. J. Gan,“Effects of TMSb/TEGa ratios on epilayer properties of GaSb grown by low pressure MOCVD,”Journal of Applied Physics, Vol. 68, No. 12, pp.6383-6387, 1990.
Conference Papers

國外研討會:
1. Kwang-Jow Gan, Dong-Shong Liang, Cher-Shiung Tsai, Chun-Ming Wen, Yi-Zhi Lin, and Te-Chia Chang, “Design of Four-Valued Memory Using Three-Peak MOS-HBT-NDR Circuits”, The Fifth IASTED International Conference on Circuits, Signals, and Systems, Banff, Alberta, Canada, July 2-4, 2007, pp. (ISBN:978-0-88986-670-6)
2. Kwang-Jow Gan, Dong-Shong Liang, Cher-Shiung Tsai, Yi-Jhih Lin, Yaw-Hwang Chen,Te-Chia Chang, and Wein-So Wang, “Novel Multiple-Valued Memory Design by Standard SiGe Process”, 4th International Conference on Materials for Advanced Technologies (ICMAT 2007), Singapore July 1-6, 2007, pp. (ISBN:).
3. Dong-Shong Liang, Kwang-Jow Gan, Cher-Shiung Tsai, Te-Chia Chang, and Yi-Jhih Lin “New Negative Differential Resistance Device Design Suitable for Standard SiGe BiCMOS Nano-Technique”, 4th International Conference on Materials for Advanced Technologies (ICMAT 2007), Singapore July 1-6, 2007, pp. (ISBN:).
4. Kwang-Jow Gan, Dong-Shong Liang*, Cher-Shiung Tsai, Yaw-Hwang Chen, and Chun-Ming Wen, “Five-State Logic Using MOS-HBT-NDR Circuit by Standard SiGe BiCMOS Process”, 2006 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), Singapore Dec. 4-7, 2006, pp. 1356-1359. (ISBN:1-4244-0387-1).
5. Dong-Shong Liang, Kwang-Jow Gan, Cher-Shiung Tsai, and Yaw-Hwang Chen, “AND and NAND Logic Circuit Design Using NDR-Based Device Suitable for CMOS Process”, 2006 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), Singapore Dec. 4-7, 2006, pp. 1360-1363. (ISBN:1-4244-0387-1).
6. Dong-Shong Liang, Yaw-Hwang Chen, Chun-Min Wen, Chun-Da Tu, Kwang-Jow Gan and Cher-Shiung Tsai, “The Design of MOS-NDR-Based Cellular Neural Network”, 2006 International Joint Conference on Neural Networks, Sheraton Vancouver Wall Centre, Vancouver, BC, Canada, July 16-21, 2006, pp.2012-2014. (ISBN:0-7803-9490-9).
7. Dong-Shong Liang*, Kwang-Jow Gan, Chun-Da Tu, Cher-Shiung Tsai, and Yaw-Hwang Chen, “Frequency Multiplier Design Based on Multiple-Peak R-BJT-NDR Devices Fabricated by SiGe Technology”, 16th Biennial University Government Industry Microelectronics Symposium, San Jose State University, San Jose, CA, USA, June 25-28, 2006, pp. 239-242. (ISBN:1-4244-0268-9).
8. Dong-Shong Liang*, Yaw-Hwang Chen, Chun-Min Wen, Chun-Da Tu, Kwang-Jow Gan, and Cher-Shiung Tsai, “The Design of MOS-BJT-NDR-Based Cellular Neural Network”, 16th Biennial University Government Industry Microelectronics Symposium, San Jose State University, San Jose, CA, USA, June 25-28, 2006, pp. 187-188. (ISBN:1-4244-0268-9).
9. Kwang-Jow Gan, Dong-Shong Liang, Cher-Shiung Tsai, Yaw-Hwang Chen, and Shin-Bin Kuo, “OR and NOR Logic Circuit Design Using Negative Differential Resistance Device Fabricated by CMOS Process”, 2005 IEEE Conference on Electron Devices and Solid-State Circuits (EDSSC), New World Renaissance Hotel, Hong Kong, China, Dec. 19-21, 2005, pp. 813-816. (ISBN:0-7803-9339-2).
10. Kwang-Jow Gan, Dong-Shong Liang, Chung-Chih Hsiao, Cher-Shiung Tsai, and Yaw-Hwang Chen, “Investigation of MOS-NDR Voltage Controlled Ring Oscillator Fabricated by CMOS Process”, 2005 IEEE Conference on Electron Devices and Solid-State Circuits (EDSSC), New World Renaissance Hotel, Hong Kong, China, Dec. 19-21, 2005, pp. 825-827. (ISBN:0-7803-9339-2).
11. Kwang-Jow Gan, Dong-Shong Liang, Chung-Chih Hsiao, Shih-Yu Wang, Feng-Chang Chiang, Cher-Shiung Tsai, Yaw-Hwang Chen, Shun-Huo Kuo, and Chi-Pin Chen, “Logic Circuit Design Based on MOS-NDR Devices and Circuits Fabricated by CMOS Process”, 2005 International Workshop on System-on-Chip, Banff, Alberta, Canada, July 20-24, 2005, pp. 392-395. (ISBN:0-7695-2403-6).
12. Dong-Shong Liang, Kwang-Jow Gan, Chung-Chih Hsiao, Cher-Shiung Tsai, Yaw-Hwang Chen, Shih-Yu Wang, Shun-Huo Kuo, Feng-Chang Chiang, and Long-Xian Su, “Novel Voltage-Controlled Oscillator Design by MOS-NDR Devices and Circuits”, 2005 International Workshop on System-on-Chip, Banff, Alberta, Canada, July 20-24, 2005, pp. 372-375. (ISBN:0-7695-2403-6).
13. Dong-Shong Liang, Kwang-Jow Gan, Long-Xian Su, Chi-Pin Chen, Chung-Chih Hsiao, Cher-Shiung Tsai, Yaw-Hwang Chen, Shih-Yu Wang, Shun-Huo Kuo, and Feng-Chang Chiang, “Four-Valued Memory Circuit Designed by Multiple-Peak MOS-NDR Devices and Circuits”, 2005 International Workshop on System-on-Chip, Banff, Alberta, Canada, July 20-24, 2005, pp. 78-81. (ISBN:0-7695-2403-6).
14. Kwang-Jow Gan, Dong-Shong Liang, Shih-Yu Wang, Chung-Chih Hsiao, Cher-Shiung Tsai, Yaw-Hwang Chen, and Feng-Chang Chiang, “High-Frequency Voltage-Controlled Oscillator Design by MOS-MDR Devices and Circuits”, 2005 IEEE AP-S Interational Symposium and USNC/URSI National Radio Science Meeting, Omni Shoreham Hotel, NW, Washington, DC, USA, July 3-8, 2005, pp. 33. (ISBN:0-7803-8884-4).
15. T. S. Wu, Y. K. Su, F. S. Juang, N. Y. Li, and K. J. Gan,“Ohmic and Schottky contacts to GaSb,”International Conference on Thin Film and Applications, Shanghai, China, pp. 15-17, April, 1991.
16. T. S. Wu, Y. K. Su, F. S. Juang, N. Y. Li, and K. J. Gan,“Effects of TMSb/TEGa ratios on epilayer properties of GaSb grown by low pressure MOCVD, ”SPIE's International Conference on Physical Concepts for Novel Optoelectronic Device Applications, Aachen, Federal Republic of Germany. 1990.

國內研討會:
國際型
1. Y.K. LI , K.J. Gan, C. S. Tsai, P.H. Chang and Y. H. Chen “Achieve a New Type Frequency Divider Circuit and Application By MOS-HBT-NDR” IWEN, Kun-Shan University,Taiwan,R.O.C,2008
2. Cher-Shiung Tsai, Ming-Hsin Lin, Ping-Feng Wu, Chang-Yu Li, Yu-Nan Yeh, Wu-Yan Sie, Kwang-Jow Gan, Pei-Hua Chang, Dong-Shong Liang, Jin-Wei Wu and Chia-Hsiang Chang“An Oscillator Design Based on Bi-CMOS Differential Amplifier Using Standard SiGe Process”IWEN, Kun-Shan University ,Taiwan,R.O.C,2008
3. Y.W. Chen , K.J. Gan, C. S. Tsai, Y.H. Chen and D. S. Liang “Analysis of Multi-Peak Memory Circuit Using Resistance as Load” IWEN, Kun-Shan University,Taiwan,R.O.C,2008
4. Kwang-Jow Gan, Dong-Shong Liang*, Jing-Shun Wang, Yi-Jhih Lin, Shih-Hao Liou, Shih-Syun Hong, Wei-Lun Sun, Yaw-Hwang Chen, Cher-Shiung Tsai, and Cheng-Chi Tai*, “Design and Analysis of Frequency Divider Using Negative Differential Resistance Device”, International Electron Devices and Materials Symposium (IEDMS), National Cheng Kung University, Tainan, Taiwan, R.O.C., Dec. 7-8, pp. 499-500, 2006.
5. Kwang-Jow Gan, Yi-Zhi Lin, Jing-Siang Ciou, Yu-Sheng Liou, Cher-Shiung Tsai, Yaw-Hwang Chen, Shih-Hao Liou, Hong,Shih-Syun, and Wang,Jing-Shun, “Investigation of the Multiple-Valued Memory Cell Based on MOS-HBT-NDR Circuits”, Internationl Electron Devices and Materials Symposium (IEDMS), National Cheng Kung University, Tainan, Taiwan, R.O.C., Dec. 7-8, pp. 213-214, 2006.
6. Cher-Shiung Tsai, Zong-Xian Tsai, Kun-Yuan Huang, Kwang-Jow Gan and Dong-Shong Liang, “Comparisons between Two Bi-CMOS Differential Amplifier Oscillators”, Internationl Electron Devices and Materials Symposium (IEDMS), National Cheng Kung University, Tainan, Taiwan, R.O.C., Dec. 7-8, pp. 328-329, 2006.
7. Kwang-Jow Gan, Chun-Da Tu, Wei-Lun Sun, Yaw-Hwang Chen, Chun-Ming Wen, Cher-Shiung Tsai, and Dong-Shong Liang, “Fabrication of MOS-BJT-NDR Voltage Controlled Ring Oscillator by SiGe Process”, International Workshop on Multi-Project Chip (IWMC), Part of 2006 Symposium of Photonic Devices and System Applications, National Taiwan Normal University, Taipei, Taiwan, R.O.C., April 1-4, M12, 2006.
8. Cher-Shiung Tsai, Chia-Hung Chen, Jia-Wei Hong, Chin-Yo Shen, Yih-Tsan Lee, Kwang-Jow Gan, Yaw-Hwang Chen, and Chun-Ming Wen, “An Oscillator Design Based on BJT Cascode Load Differential Amp.”, International Workshop on Multi-Project Chip (IWMC), Part of 2006 Symposium of Photonic Devices and System Applications, National Taiwan Normal University, Taipei, Taiwan, R.O.C., April 1-4, M13, 2006.
9. Cher-Shiung Tsai, Chia-Hung Chen, Zong-Xian Tsai, Kun-Yuan Huang, Yu-Xiang Chen, Zhi-Jiao Huang, Kwang-Jow Gan, and Yaw-Hwang Chen, “An Oscillator Design Based on Bi-CMOS Differential Amplifier”, International Workshop on Multi-Project Chip (IWMC), Part of 2006 Symposium of Photonic Devices and System Applications, National Taiwan Normal University, Taipei, Taiwan, R.O.C., April 1-4, M14, 2006.
10. Cher-Shiung Tsai, Chung-Chih Hsiao, Kwang-Jow Gan, Jia-Ming Wu, Ming-Yi Hsieh, Chun-Chieh Liao, Shih-Yu Wang, Feng-Chang Chiang, Dong-Shong Liang, and Yaw-Hwang Chen, “An Oscillator Design Based on MOS-NDR Inverter”, International Conference on Systems and Signals, I-Shou University, Kaohsiung, Taiwan, R.O.C., April 28-29, 2005.
11. Yaw-Hwang Chen, Long-Xian Su, Chi-Pin Chen, Kwang-Jow Gan, and Cher-shiung Tsai, “Design and Simulation of Discrete-Time Cellular Neural Network by Negative Differential Resistance Devices”, International Conference on Systems and Signals, I-Shou University, Kaohsiung, Taiwan, R.O.C., April 28-29, 2005.
12. Yaw-Hwang Chen, Chi-Pin Chen, Long-Xian Su, Kwang-Jow Gan, and Cher-Shiung Tsai, “Design and Numerical Analysis of Frequency Divider by Negative Differential Resistance Devices”, International Conference on Systems and Signals, I-Shou University, Kaohsiung, Taiwan, R.O.C., April 28-29, 2005.
13. Kwang-Jow Gan, Wen-Pin Huang, Cher-Shiung Tsai, Kuan-Rong Lee, Dong-Shong Liang, Yaw-Hwang Chen, and Hsin-Da Tesng, “Novel Inverter Design Based on Negative Differential Resistance
Devices Fabricated by CMOS Process”, 2003 International Conference on Informatics, Cybernetics, and Systems, I-Shou University, Kaohsiung, Taiwan, R.O.C., December 14-16, pp. 296-300, 2003. 14. Kwang-Jow Gan, Dong-Shong Liang, Pei-Kai Huang, I-Shien Lai, Cher-Shiung Tsai, and Ti-Tasi Lin, “Development of Simulation Tool for the Series Circuit of Esaki-Diode-Like Device”, 2002 International Electron Devices and Materials Symposium (2002, IEDM), National Taiwan University, Taipei, Taiwan, R.O.C., December 20-21, 2002, pp. 697-700.
15. Kwang-Jow Gan, Cher-Shiung Tsai, Dong-Shong Liang, and Wein-So Wang, “The Effect of Series Resistance on the Current-Voltage Characteristics of NDR Devices”, 2002 International Electron Devices and Materials Symposium (2002, IEDM), National Taiwan University, Taipei, Taiwan, R.O.C., December 20-21, 2002, pp. 701-704.
16. Kwang-Jow Gan, Shin-Bin Kuo, Dong-Shong Liang, Cher-Shiung Tsai, Wein-So Wang, and Ti-Tasi Lin, “ Frequency Multiplier Using Si-Based Negative Differential Resistance Devices Connected in Parallel”, 2002 International Electron Devices and Materials Symposium (2002, IEDM), National Taiwan University, Taipei, Taiwan, R.O.C., December 20-21, 2002, pp. 527-529.
17. Kwang-Jow Gan, Dong-Shong Liang, Cher-Shiung Tsai, and Shin-Bin Kuo, “Novel Inverter Circuit Design Based on Negative Differential Resistance Devices”, 2002 International Electron Devices and Materials Symposium (2002, IEDM), National Taiwan University, Taipei, Taiwan, R.O.C., December 20-21, 2002, pp. 809-812.
18. Kwang-Jow Gan, Cher-Shiung Tsai, Shin-Bin Kuo, Wen-Pin Huang, Hsin-Da Tesng, Fu-Lung Cheng, and Dong-Shong Liang, “Novel Multi-State Memory Circuit Based on Negative Differential Resistance Devices”, 2002 International Electron Devices and Materials Symposium (2002, IEDM), National Taiwan University, Taipei, Taiwan, R.O.C., December 20-21, 2002, pp. 805-808.
19. Kwang-Jow Gan, Wen-Pin Huang, Hsin-Da Tesng, Cheng-Chih Hsu, and Dong-Shong Liang, “Large-Signal DC Model of Multiple-Peak NDR Devices Suitable for PSpice Simulation”, 2002 International Electron Devices and Materials Symposium (2002, IEDM), National Taiwan University, Taipei, Taiwan, R.O.C., December 20-21, 2002, pp. 534-537.
20. Kwang-Jow Gan, Yan-Kuin Su, Ruey-Lue Wang, and Ti-Tasi Lin,“The conditions for three-peak current-voltage characteristics by connecting two negative differential resistance devices in series,”1998 Internationl Electron Devices and Materials Symposium (1998, IEDM), National Cheng Kung University, Tainan, Taiwan, R.O.C., December, 1998, pp. 357-361.
21. Y. K. Su, F. S. Juang, T. S. Wu, N. Y. Li, and K. J. Gan,“Growth and characterization of undoped GaSb on GaSb and GaAs substrates,” 1990 International Electron Devices and Materiala Symposium (1990, IEDM), Hsinchu, Taiwan, R.O.C., pp. 80-93, 1990.

國內型
1. 陳冠宇、甘廣宙、蔡澈雄“以HBT-MOS-NDR元件設計具高除頻因素之除頻器電路” 2009第三屆積體光機電科技與智慧財產權實務研討會,台灣大學,98/8/6。
2. 張家祥、蔡澈雄、甘廣宙“以0.18-μm製程模擬Bi-CMOS主動負載差動 放大器為設計基礎之壓控振盪器”2009第三屆積體光機電科技與智慧財產權實務研討會,台灣大學,98/8/6。
3. 王士瑋、甘廣宙、張培華“以隔絕外來光源種植方式使用LED培育植物之研究” 第三屆積體光機電科技與智慧財產權實務研討會,台灣大學,97/8/6。
4. 陳彥汶、甘廣宙、蔡澈雄,“以具有高峰值與谷值電流比之多值記憶器電路設計與應用”,2009第三屆積體光機電科技與智慧財產權實務研討會,台灣大學,97/8/6。
5. 李昱寬, 甘廣宙, 蔡澈雄“以MOBILE理論應用於新型反相器電路”第四屆智慧生活科技研討會,國立勤益科技大學,98/6/5
6. 陳冠宇、甘廣宙、張培華“新型MOS-NDR元件應用於除頻器電路” The 4th Intelligent Living Technology ConferenceNCUT, Taichung, Taiwan, June 5, 2009
7. 劉士豪、甘廣宙、陳耀煌、蔡澈雄,“以MOBILE反相器為基礎應用於新型邏輯閘電路設計”, 2007系統雛形與電路設計創新應用研討會,崑山科技大學,96/9/28。
8. Cher-Shiung Tsai, Shu-Yin Jiang, Ming-Yuan Guo, Kwang-Jow Gan and Pei-Hua Chang, “A VHF Oscillator Design Based on BJT Cascode Active Load Differential Amplifier”,2007系統雛形與電路設計創新應用研討會,崑山科技大學,96/9/28。
9. 林明信、蔡澈雄、甘廣宙、梁東雄、張台雄,“以Bi-CMOS疊串主動負載差動放大器為設計基礎的UHF壓控振盪器之模擬”,2007年現代電機科技研討會,96/6/8。
10. 洪士勛、甘廣宙、陳耀煌、蔡澈雄,“N型HBT-NDR元件在邏輯電路的應用”,2007年現代電機科技研討會,96/6/8。
11. 劉士豪、甘廣宙、蔡澈雄、陳耀煌,“將Λ型MOS-HBT-NDR電路應用在多功能邏輯閘電路設計”,第二屆智慧生活科技研討會,國立勤益科技大學,96/6/1。(ISBN:978-957-21-5854-8)
12. 洪士勛、陳耀煌、甘廣宙、蔡澈雄,“N型HBT-NDR元件在除頻器的應用”,第二屆智慧生活科技研討會,國立勤益科技大學,96/6/1。(ISBN:978-957-21-5854-8)
13. 林奕志、甘廣宙、陳耀煌、蔡澈雄、張培華,"以MOS-HBT-NDR元件設計可選擇之多值記憶器",第五屆微電子技術發展與應用研討會,高雄海洋科技大學,96/5/18。
14. 王敬舜、甘廣宙、陳耀煌、蔡澈雄、梁東雄,"除頻器的設計",第五屆微電子技術發展與應用研討會,高雄海洋科技大學,96/5/18。
15. 林明信、蔡澈雄、甘廣宙、陳耀煌、張培華、陳炳元,"以Bi-COMS主動負載差動放大器為設計基礎的UHF壓控振盪器之模擬",第五屆微電子技術發展與應用研討會,高雄海洋科技大學,96/5/18。
16. 林明信、蔡澈雄、甘廣宙、張培華、陳炳沅, “以Bi-COMS疊串主動負載差動放大器為設計基礎的振盪器之模擬”,2007智慧型系統工程應用研討會,遠東科技大學,96/3/20。
17. 劉士豪、甘廣宙、蔡澈雄,"以多峰值負微分電阻元件設計倍頻器電路",2006多媒體及通訊系統研討會,義守大學,95/12/16。
18. 蔡宗憲、洪家偉、蔡澈雄、甘廣宙、陳耀煌,"以MOS主動負載差動放大器為設計基礎的振盪器之模擬",2006多媒體及通訊系統研討會,義守大學,95/12/16。
19. 孫偉倫、甘廣宙,"以MOS-HBT-NDR元件串聯電感-電阻來實現振盪器電路",第一屆電資科技應用與發展學術研討會,萬能科技大學,95/12/8。
20. 孫偉倫、甘廣宙、蔡澈雄,"以HBT-NDR元件設計振盪器電路",第一屆電資科技應用與發展學術研討會,萬能科技大學,95/12/8。
21. 洪士勛、甘廣宙、陳耀煌,"以MOS-HBT-NDR元件設計類比/數位轉換器",第一屆電資科技應用與發展學術研討會,萬能科技大學,95/12/8。
22. 林奕志、甘廣宙、陳耀煌、揚緒濃、劉育昇,"以MOS-HBT-NDR元件設計多值多工器",第一屆電資科技應用與發展學術研討會,萬能科技大學,95/12/8。
23. 邱景祥、沈俊佑、蔡澈雄、甘廣宙,"以MOS-HBT-NDR元件設計新型多值記憶器電路",第一屆電資科技應用與發展學術研討會,萬能科技大學,95/12/8。
24. 陳裕翔、黃致校、邱景祥、甘廣宙、蔡澈雄,"以MOS疊串主動負載差動放大器為設計基礎的振盪器之模擬",第一屆電資科技應用與發展學術研討會,萬能科技大學,95/12/8。
25. 孫偉倫、甘廣宙、蔡澈雄、陳耀煌、梁東雄,“以N型MOS-NDR元件來設計D型正反器”,第一屆智慧生活科技研討會,勤益技術學院,95/6/9,pp.470-473。
26. 孫偉倫、甘廣宙、蔡澈雄、陳耀煌、邱景祥、劉育昇、梁東雄, “ 新型正反器的設計及其在除頻器電路上的應用 ”,2006高速電路板設計研討會,聖約翰科技大學,95/6/9。(ISBN:957-21-5405-2)
27. 劉育昇、甘廣宙、蔡澈雄、陳耀煌、邱景祥,“以負微分電阻元件實現新奇多值多工器電路”,2006高速電路板設計研討會,聖約翰科技大學,95/6/9。(ISBN:957-21-5405-2)
28. 塗俊達、甘廣宙、蔡澈雄、陳耀煌、梁東雄、邱景祥,“以多峰值R-BJT-NDR元件設計倍頻器電路”,2006高速電路板設計研討會,聖約翰科技大學,95/6/9。(ISBN:957-21-5405-2)
29. 溫峻明、甘廣宙、陳耀煌、楊緒濃、蔡澈雄、劉育昇,“以MOS-HBT-NDR元件實現除頻器電路”, 2006高速電路板設計研討會,聖約翰科技大學,95/6/9。(ISBN:957-21-5405-2)
30. 邱景祥、甘廣宙、梁東雄、林奕志、劉育昇,“以MOS-NDR元件設計多值記憶器電路”,2006高速電路板設計研討會,聖約翰科技大學,95/6/9。(ISBN:957-21-5405-2)
31. 陳家弘、蔡澈雄、甘廣宙、梁東雄、陳耀煌、曾勝暘,“以負微分電阻元件之壓控振盪器為設計基礎的鎖相迴路之模擬”,2006高速電路板設計研討會,聖約翰科技大學,95/6/9。(ISBN:957-21-5405-2)
32. Cher-shiung Tsai, Chin-Yo Shen, Yih-Tsan Lee, Jia-Wei Hong, Kun-Yuan Huang, Kwang-Jow Gan, Dong-Shong Liang and Yaw-Hwang Chen, “An Oscillator Design Based on Bi-CMOS Cascode Load Differential Amplifier”, 2006高速電路板設計研討會,聖約翰科技大學,95/6/9。(ISBN:957-21-5405-2)
33. 甘廣宙、孫偉倫、蔡澈雄、陳耀煌、梁東雄, “新型Λ型MOS-BJT-NDR元件的設計及其在邏輯電路上的應用” , 2006年現代電機科技研討會, 吳鳳技術學院, 95/6/2 , pp.244-248。
34. 陳家弘、蔡澈雄、甘廣宙、梁東雄、陳耀煌, “以差動放大壓控振盪器為設計基礎的鎖相迴路之模擬” , 2006年現代電機科技研討會, 吳鳳技術學院, 95/6/2 , pp. 159-164。
35. Cher-shiung Tsai, Chin-Yo Shen, Yih-Tsan Lee, Jia-Wei Hong, Kun-Yuan Huang, Kwang-Jow Gan, Dong-Shong Liang and Yaw-Hwang Chen, “Oscillators Design Based on MOS Active Load and Cascode Active Load Differential Amplifier”, 2006年現代電機科技研討會, 吳鳳技術學院, 95/6/2 , pp. 238-243。
36. Kwang-Jow Gan, Chun-Da Tu, Chi-Pin Chen, Yaw-Hwang Chen, Cher-Shiung Tsai, Dong-Shong Liang, Wei-Lun Sun, Chia-Hung Chen, Chun-Ming Wen, Chung-Chih Hsiao, Shih-Yu Wang, and Feng-Chang Chiang, “Frequency Divider Design Using Negative Differential Resistance Device”, 2005電子元件暨材料研討會, 義守大學,11/24~25, 2005.
37. Kwang-Jow Gan, Chung-Chih Hsiao, Shih-Yu Wang, Feng-Chang Chiang, Cher-Shiung Tsai, Yaw-Hwang Chen, Dong-Shong Liang, Chun-Da Tu, Wei-Lun Sun, Chia-Hung Chen, Chun-Ming Wen, Chun-Chieh Liao, Jia-Ming Wu, and Ming-Yi Hsieh, “Design and Fabrication of Voltage-Controlled Oscillator by Novel MOS-MDR Device”, 2005電子元件暨材料研討會, 義守大學,94/11/24~25.
38. Cher-Shiung Tsai, Ming-Yi Hsieh, Jia-Ming Wu, Chun-Chieh Liao, Jeng-Lung Wu, Kwang-Jow Gan, Yaw-Hwang Chen, Dong-Shong Liang, Chia-Hung Chen and Chung-Chih Hsiao, “An Oscillator Design Based on MOS Differential Amplifier by Simulation, 2005電子元件暨材料研討會, 義守大學,94/11/24~25.
39. Cher-Shiung Tsai, Chun-Chieh Liao, Ming-Yi Hsieh, Jia-Ming Wu, Tien-Hung Chang, Kwang-Jow Gan, Dong-Shong Liang, Yaw-Hwang Chen, and Chia-Hung Chen, “An Oscillator Design Based On BJT Differential Amplifier by Simulation”, 2005年民生電子暨信號處理研討會, 雲林科技大學, 94/11/17~18.
40. 塗俊達、甘廣宙、王仕裕、蔡澈雄、陳耀煌,“以MOS-BJT-NDR元件設計壓控振盪器電路”, 2005全國網際網路暨通訊科技研討會, 聖約翰科技大學, 94/11/16, pp. 273-276. (ISBN:986-81668-0-2)
41. 溫峻明、陳耀煌、甘廣宙、蔡澈雄,“以MOS-BJT-NDR元件設計多值多工器電路”, 2005全國網際網路暨通訊科技研討會, 聖約翰科技大學, 94/11/16, pp. 277-280. (ISBN:986-81668-0-2)
42 Cher-Shiung Tsai, Jia-Ming Wu, Ming-Yi Hsieh, Chun-Chieh Liao, Jeng-Lung Wu, Kwang-Jow Gan, Dong-Shong Liang, Yaw-Hwang Chen, and Chia-Hung Chen, “A VHF Oscillator Design Based on MOS Differential Amplifier”, 2005全國網際網路暨通訊科技研討會, 聖約翰科技大學, 94/11/16, pp. 101-106. (ISBN:986-81668-0-2)
43. Cher-Shiung Tsai, Jia-Ming Wu, Ming-Yi Hsieh, Chun-Chieh Liao, Tien-Hung Chang, Kwang-Jow Gan, Dong-Shong Liang, Yaw-Hwang Chen, Chia-Hung Chen, and Chun-Ming Wen, “A MOS Differential Amplifier Oscillator”, 第十六屆VLSI Design/CAD 研討會, 中央大學, 花蓮美崙大飯店, 94/8/9~12, 2005.
44. Dong-Shong Liang, Kwang-Jow Gan, Chung-Chih Hsiao, Cher-Shiung Tsai, Yaw-Hwang Chen, Shun-Huo Kuo, and Hsin-Da Tesng, “Implementation of R-BJT-NDR Devices and Inverter Circuit by BiCMOS Technology”, 第三屆微電子技術發展與應用研討會, 國立高雄海洋科技大學, 94/5/20, 2005. B. 10, pp. 41
45. Cher-Shiung Tsai, Chun-Chieh Liao, Jia-Ming Wu, Ming-Yi Hsieh, Kwang-Jow Gan, Dong-Shong Liang, Yaw-Hwang Chen, Chia-Hung Chen, and To-Kai Liang, “An Oscillator Design Based on BJT Differential Amplifier”, 第三屆微電子技術發展與應用研討會, 國立高雄海洋科技大學, 94/5/20, 2005. D. 6, pp. 92.
46. Kwang-Jow Gan, Chi-Pin Chen, Long-Xian Su, To-Kai Liang, Cher-Shiung Tsai, Yaw-Hwang Chen, Chung-Chih Hsiao, Shih-Yu Wang, and Feng-Chang Chiang, “A NAND Gate Design Based on MOS-NDR Devices and Circuits Implemented by CMOS Technology”, 1st Applied Science and Technology-Photonics and Communications (ASTC), 國立高雄應用科技大學, 93/12/9~93/12/10, 2004, B05.
47. To-Kai Liang, Kwang-Jow Gan, Cher-Shiung Tsai, Shih-Yu Wang, Chung-Chih Hsiao, Feng-Chang Chiang, Yaw-Hwang Chen, Chi-Pin Chen, and Long-Xian Su, “Oscillator Design by MOS-NDR Devices and Circuits”, 1st Applied Science and Technology-Photonics and Communications (ASTC), 國立高雄應用科技大學, 93/12/9~93/12/10, 2004, QH09.
48. To-Kai Liang, Kwang-Jow Gan, Cher-Shiung Tsai, Yaw-Hwang Chen, Chi-Pin Chen, Long-Xian Su, Chung-Chih Hsiao, Feng-Chang Chiang, and Shih-Yu Wang, “Frequency Multiplier Using Multiple-Peak MOS-NDR Devices and Circuits”, 1st Applied Science and Technology-Photonics and Communications (ASTC), 國立高雄應用科技大學, 93/12/9~93/12/10, 2004, QM17.
49. To-Kai Liang, Shih-Yu Wang, Kwang-Jow Gan, Cher-Shiung Tsai, Chung-Chih Hsiao, Feng-Chang Chiang, Yaw-Hwang Chen, Chi-Pin Chen, and Long-Xian Su, “Design and Simulation of Voltage Controlled Oscillator with High Frequency by Negative Differential Resistance Devices and Integrated Circuits”, 1st Applied Science and Technology-Photonics and Communications (ASTC), 國立高雄應用科技大學, 93/12/9~93/12/10, 2004, QH08.
50. Kwang-Jow Gan, To-Kai Liang, Shin-Bin Kuo, Cher-Shiung Tsai, Yaw-Hwang Chen,Chi-Pin Chen, and Long-Xian Su, “A NOR Logic Circuit Based on MOS-NDR Devices Fabricated by CMOS Technology”, 第十五屆 VLSI Design/CAD 研討會, 墾丁福華度假大飯店, 93/8/10~93/8/13, P4-14, 2004.
51. 黃文賓, 甘廣宙, 李冠榮, 陳耀煌, 蔡澈雄, “以金氧半-負微分電阻元件與CMOS製程所設計之反相器的研究”, 2003中國材料科學學會年會, 崑山科技大學, 92/11/21~22, 2003.
52. 黃文賓, 甘廣宙, 李冠榮, 曾信達 ,蔡澈雄, 陳耀煌, “適合CMOS製程的MOS-NDR元件製作與反或閘應用電路的設計”, 2003中國材料科學學會年會, 崑山科技大學, 92/11/21~22, 2003.
53. Kwang-Jow Gan, Wen-Pin Huang, Hsin-Da Tesng, Cher-Shiung Tsai, Yaw-Hwang Chen, Dong-Shong Liang, Shin-Bin Kuo, Kuan-Rong Lee, and Tai-Hsiung Chang, “The Combined Current-Voltage Characteristics for Two Similar NDR Devices in Series”, 2003 Electronic Devices and Material Symposium (EDMS), National Taiwan Ocean University, Taipei, Taiwan, R.O.C., November 21-22, 2003, pp. 322-325.
54. Kwang-Jow Gan, Hsin-Da Tesng, Wen-Pin Huang, Cher-Shiung Tsai, Dong-Shong Liang, Yaw-Hwang Chen, Kuan-Rong Lee*, and Shin-Bin Kuo, “Seven-Peak Current-Voltage Characteristics Based on the Combination of Four Negative Differential Resistance Devices”, 2003 Electronic Devices and Material Symposium (EDMS), National Taiwan Ocean University, Taipei, Taiwan, R.O.C., November 21-22, 2003, pp. 549-552.
55. Kwang-Jow Gan, Cher-Shiung Tsai, Kuan-Rong Lee*, Dong-Shong Liang, Yaw-Hwang Chen, Shin-Bin Kuo, Fu-Lung Cheng, and Cheng-Chih Hsu, “The Multiple-Ladder I-V Characteristics Based on the Combination of S-type NDR Devices”, 2003 Electronic Devices and Material Symposium (EDMS), National Taiwan Ocean University, Taipei, Taiwan, R.O.C., November 21-22, 2003, pp. 573-575.
56. Kwang-Jow Gan, Shin-Bin Kuo, Cher-Shiung Tsai, Yaw-Hwang Chen, Dong-Shong Liang, Kuan-Rong Lee*, Fu-Lung Cheng, Hsin-Da Tesng, and Wen-Pin Huang, “Implementation of the Multiple-Peak I-V Characteristics by MOS-NDR Devices”, 2003 Electronic Devices and Material Symposium (EDMS), National Taiwan Ocean University, Taipei, Taiwan, R.O.C., November 21-22, 2003, pp. 85-88.
57. Cher-Shiung Tsai, Shin-Bin Kuo, Kwang-Jow Gan, Yaw-Hwang Chen, Cheng-Chih Hsu, Kuan-Rong Lee*, and Dong-Shong Liang, “Design and Fabrication of Prototype MOS-NDR Devices by CMOS Technology”, 2003 Electronic Devices and Material Symposium (EDMS), National Taiwan Ocean University, Taipei, Taiwan, R.O.C., November 21-22, 2003, pp. 235-238.
58. Cher-Shiung Tsai, Fu-Lung Cheng, Kwang-Jow Gan, Yaw-Hwang Chen Hsin-Da Tesng, Dong-Shong Liang, and Cheng-Chih Hsu, “Characterization of Prototype BJT-MOS-NDR Devices by BiCMOS Technology”, 2003 Electronic Devices and Material Symposium (EDMS), National Taiwan Ocean University, Taipei, Taiwan, R.O.C., November 21-22, 2003, pp. 239-242.
59. Yaw-Hwang Chen, Cheng-Chih Hsu, Kwang-Jow Gan, Cher-Shiung Tsai Shin-Bin Kuo, and Fu-Lung Cheng, “Model Analysis and Simulation of the MOS-NDR Device”, 2003 Electronic Devices and Material Symposium (EDMS), National Taiwan Ocean University, Taipei, Taiwan, R.O.C., November 21-22, 2003, pp. 112-115.
60. 甘廣宙、蔡澈雄、王祥銘、彭聖哲、梁東雄,“負微分電阻元件設計之反相器的研究”, 第十七屆全國技術及職業教育研討會, 屏東科技大學, 91/04/28~91/04/29, pp. 1127-1134.
61. Kwang-Jow Gan, Shyang-Ming Wang, Shi-Bin Kuo, Sheng-Che Pang and Cher-Shiung Tsai,“Frequency multiplier using series-connected negative differential resistance devices,”, 2001 Electronic Devices and Material Symposium (EDMS), Kaohsiung, Taiwan, R.O.C., December 12-13, 2001, pp. 387-389.
62. Kwang-Jow Gan, Sheng-Che Pang, Shyang-Ming Wang, Shi-Bin Kuo, Hui-Ting Lin and Dong-Shong Liang, “Multi-valued memory cell based on multiple-peak negative differential resistance devices,”, 2001 Electronic Devices and Material Symposium (EDMS), Kaohsiung, Taiwan, R.O.C., December 12-13, 2001, pp. 384-386.
63. 甘廣宙、梁東雄、蔡澈雄、賴宜賢、黃培凱, “模擬與分析類透納二極體元件串聯電路之電腦輔助設計”, 第十六屆全國技術及職業教育研討會, 慈濟技術學院, 90/04/28~90/04/29, 2001, pp. 49-58.
64. 林地財, 洪偉銘, 甘廣宙, 謝和銘, “自製CAD應用於類比濾波器之研究”, 2000年暨第五屆全國電腦與通訊研討會, 大葉大學, 89/10/06~89/10/07, 2000, pp. 7-11.
65. Kwang-Jow Gan, Dong-Shong Liang, Cher-Shinug Tasi, and Wein-So Wang, “Modeling and simulation of the current-voltage characteristics of identical RTD-like devices in series”, 第十一屆 VLSI Design/CAD 研討會, 雲林科技大學, 89/8/16~89/8/19, 2000, pp. 239-242.
66. 甘廣宙、賴宜賢、黃培凱、陳泂良、郭士賓, “模擬與分析N型負微分電阻元件串接電路之電腦輔助軟體設計”, 第十五屆全國技術及職業教育研討會, 嶺東技術學院, 89/04/28~89/04/29, 2000, pp. 27-36.
67. Kwang-Jow Gan, Dong-Shong Liang, Ti-Tasi Lin, and Cher-Shinug Tasi, “Simulation of the combined current-voltage characteristics for NDR devices in series”,一九九九年電子元件暨材料研討會與中華民國電子材料與元件協會年會(1999, EDMS), 長庚大學, 88/11/25~88/11/26, 1999, pp. 141-144.
68. 林地財、甘廣宙、謝和銘、陳柏先、鄭書賢,「被動/主動濾波器電腦輔助設計」,86 學年度技專院校重點科技專題製作論文研討會, 龍華技術學院, 八十七年六月五日,1998.
69. 林地財、甘廣宙、謝和銘、陳柏先、鄭書賢,「被動/主動濾波器電腦輔助設計」,The Third Symposium on Computer & Communication Technology, Chung-Li, Taiwan, R.O.C., October 3, 1997.
70. Kwang-Jow Gan, Ti-Tasi Lin, Ruey-Lue Wang, Shih-Chang Shei, and Yan-Kuin Su,“Study of low-frequency noise in SiO2/InP MISFET structure,”The 12th Technological and Vocational Education, Taichung County, Taiwan, R.O.C., April, 1997.
71. Kwang-Jow Gan, Ruey-Lue Wang, and Yan-Kuin Su,“Piecewise-linear modeling of current-voltage characteristics of negative differential resistance devices by Pspice Simulation,”第三屆三軍官校基礎學術研討會,Kangsun, Kaohsiung County, Taiwan, R.O.C., June, 1996.
72. Kwang-Jow Gan, Ti-Tasi Lin, Ruey-Lue Wang, Shih-Chang Shei, and Yan-Kuin Su,“Study of SiO2/InP MOSFET structure prepared by direct photo-chemical vapor deposition,”The 11th Technological and Vocational Education, Kaohsiung, Taiwan, R.O.C., March, 1996.
73. 林地財、甘廣宙、林育賢,「主動濾波器電腦輔助設計」,The 11th Technological and Vocational Education, Kaohsiung, Taiwan, R.O.C., March, 1996.
74. Y. K. Su, C. Sun, S. C. Shei, and K. J. Gan,“High-frequency equivalent circuit modeling of Fe:InP/InGaAs metal-semiconductor field-effect transistor,”1st Radio Science Symposium, Kaohsiung, Taiwan, R.O.C. August 7-8, 1995.
75. K. J. Gan, S. C. Shei, Y. K. Su, Y. H. Hwang, and M. Yokoyama,“Semi-insulating properities of Fe-doped InP grown by metalorganic chemical vapor deposition,”1995 Electronic Devices and Material Symposium, Kaohsiung, Taiwan, R.O.C., July 6-7, 1995.
E2502 (ok)Four-Valued Memory Circuit Using(電子工程系)
E2502 (ok)Four-Valued Memory Circuit Using(電子工程系)

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